Intel's 1986 ICCD paper Performance Optimizations of the 80386 reveals how tightly this was optimized. The entire address translation pipeline -- effective address calculation, segment relocation, and TLB lookup -- completes in 1.5 clock cycles:
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"I used to binge-watch every single quiz show you could think of. So I've always wanted to go on a quiz show, and honestly the experience was really great.
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